SiPearl's Rhea1 Processor Reaches Initial Samples, End-2026 Delivery Planned (heise.de)

• First silicon of Rhea1 operational; customer deliveries expected by end of 2026.
• 80 ARM Neoverse V1 cores, HBM2e, DDR5, PCIe 5.0 – but two generations behind current tech.
• First deployment: Jülich Supercomputing Centre's Jupiter supercomputer (5 petaflops from Rhea1).
• SiPearl claims security without backdoors; manufacturing by TSMC in Taiwan.

"SiPearl's Rhea1, the first processor from the European Processor Initiative (EPI), has achieved first silicon samples. The 80-core ARM-based chip, with HBM2e and DDR5, is scheduled for customer delivery by end of 2026, five years behind schedule. The first deployment will be at the Jülich Supercomputing Centre in Germany for the Jupiter supercomputer. Manufacturing is by TSMC on a 7nm-class process. SiPearl claims security without backdoors or kill-switch, though such features have never been found in competitors."